% Simulation of delta-sigma ADC convertor, to model the
% ADC shown at
% http://www.analog.com/Analog_Root/static/techSupport/designTools/interactiveTools/sdtutorial/sdtutorial.html
% r.kakarala@ieee.org
% UC Berkeley Extension
% 3 Feb 2005

Vref = 5.0;        % convert -5,..+5 V.
fprintf(1,'Delta-Sigma convertor with 9 bits\n');
fprintf(1,'Range %5.1fV to %5.1fV\n',-Vref,Vref);

Vin = input('Input voltage = ');
Nclocks = 512;    % number of clocks to run

% initialize

Dac_out = 0;
Integrator = 0;
Counter = 0;                            % 9 bit counter
Integrator_Values = zeros(1,Nclocks);

% for 512 clocks, repeat delta (difference) and sigma (integrate)
for n=1:Nclocks

    Vdelta = Vin - Dac_out;
    Integrator = Integrator + Vdelta;
    Comparator = Integrator > 0;

    Counter = Counter + Comparator;     % this will be ADC output

    % set up for next step;
    if (Comparator > 0)
        Dac_out = Vref;
    else
        Dac_out = -Vref;
    end;

    % keep track of integrator for graphing later

    Integrator_Values(n) = Integrator;

end;

% write out coverted value
fprintf(1,'9 bit Counter reads %4d out of 512\n',Counter);
Error using ==> input
Cannot call INPUT from EVALC.